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ROM
7.4
7.4.1
Rights management
Memory-map restrictions
This section describes generic techniques for managing user access to restricted functions.
The MMA955xL platform is designed to accommodate a varying mix of Freescale and third-party
software. On-chip ROM is dedicated to Freescale use. The flash-memory array can be split between
Freescale and third-party code.
Table 7-1. NVM memory allocations
Memory
Size
Freescale
Third-Party
Usage
Boot functions, ROM command interpreter, flash-controller
ROM
4 KB
X
—
functions, common utilities. ROM code can be accessed only
when the CPU is in Supervisor mode.
There are 32 512-byte pages of flash memory.
Main Flash Array
16 KB
X
X
Any of these can be assigned to either Freescale or
third-party use. All content is visible in User mode.
7.4.2
Rights-management variables
Non-volatile parameters used for rights management are shown in Table 7-2 .
Table 7-2. Variables used for rights management
Register Name
Description
Bits 31-24
Bits 23-16
Bits 15-8
Bits 7-0
DID
PRR
Device ID
Page Release Register 1
(Factory Settings)
ID[31:0]
PE[31:0]
1
Not available in User mode.
7.4.2.1
Device ID (DID)
The Device ID provides a relatively unique identifier for any particular device. Freescale does not
guarantee every unit to have a unique number. However, the field will vary from device to device.
7.4.2.2
Page-Release Register
As previously mentioned, the main flash array on this device has 32 pages of 512 bytes each. User
programming/erase access to these pages is controlled via a virtual “Page-Release Register” (PRR). The
PRR is dynamically calculated by flash programming/erase firmware routines.
There is one page-enable (PE) bit in the PRR for each page. If set to “0”, the page is allocated for
Freescale use and will not be made available for customer programming. If set to “1”, the page is available
MMA955xL Intelligent, Motion-Sensing Platform Hardware Reference Manual, Rev. 1.0
78
Freescale Semiconductor, Inc.
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